A Fully Programmable Memristor-based Processing-in-Memory Architecture

Power consumption and device variability are becoming critical challenges in processor design.Memristor-based architectures are emerging as a promising alternative to traditional CMOS technology.Specialized architectures offer greater energy efficiency than general-purpose systems.However, designing application-specific computing systems can be costly.Reconfigurable architectures present a viable solution by delivering high performance and low power consumption at a more reasonable cost.This paper proposes a reconfigurable architecture based on memristor-crossbar tiles.In a tile, there is on average one-quarter of a transistor per memristor for storage, which gives a significant area benefit compared to a 1T1M crossbar tile.A single tile array could be configured for any of the following operations: memory, search, neural network, and Boolean function implementation.For these operations, we leverage the computation in memory feature of the memristor crossbar.